This application claims priority to an application entitled xe2x80x9cApparatus and Method for Interfacing between Modem and Memory in Mobile Stationxe2x80x9d filed in the Korean Industrial Property Office on Aug. 20, 2001 and assigned Serial No. 2001-50012, and to an application entitled xe2x80x9cApparatus and Method for Interfacing between Modem and Memory in Mobile Stationxe2x80x9d filed in the Korean Industrial Property Office on Jun. 17, 2002 and assigned Serial No. 2002-33697, the contents of both of which are hereby incorporated by reference.
1. Field of the Invention
The present invention relates generally to an apparatus and method for processing internal data in a mobile station (MS), and in particular, to an apparatus and method for interfacing between a modem and a memory.
2. Description of the Related Art
An MS serviced only voice calls in its earlier stage of development and now supports a variety of services including data service along with users"" growing demands and the advance of communication technology. The various services are a text service, a graphic service, E-mail, voice mail, navigation, transmission of moving pictures, etc.
The MS is provided with a modem to process data received and data to be transmitted over a wireless network. The modem is usually implemented in the form of a chip and the modem chip is essential to driving the MS. The MS is also provided with a memory for storing data from the above services and information required to operate the MS. Therefore, the MS needs an apparatus for interfacing the modem and the memory to provide the above services.
A conventional MS uses a NOR flash memory for storing application programs and OS (Operating System) codes. An interfacing structure between interfacing data between a modem and a memory in an MS using a NOR Flash memory is illustrated in FIG. 1.
Referring to FIG. 1, a chip select signal ROM_CSB, a read enable signal RDB, a write enable signal WRB, an address signal A, and a data signal D are used to interface data between a modem 110 and a NOR flash memory 112. A chip select signal (RAM_CSB) is additionally used to interface between the modem 110 and a working memory 114.
Referring to FIG. 1, the modem 110 processes data received or data to be transmitted over a wireless network. Upon generation of data for data transmission/reception over the wireless network, the modem 110 also stores the data in a NOR flash memory 112. The modem 110 reads data for transmission over the wireless network from the NOR flash memory 112. When the MS is powered-on, the modem 110 accesses basic codes required for initialization, such as boot codes, a vector table, and load codes through the NOR flash memory 112. The NOR flash memory 112 stores application programs and OS codes needed in the MS. The working memory 114 temporarily stores application programs required for the modem 110 to process predetermined data and provide a particular service, and can be accessed when necessary. The working memory 114 can be, for example, an SRAM or an UtRAM. For example, after the initialization of the MS, the modem 110 reads the OS codes and a call software from the NOR flash memory 112 and copies them in the working memory 114. Then the modem 110 accesses the working memory 114. The reason for copying data from the NOR flash memory 112 to the working memory 114 is that data can be accessed more rapidly in the working memory 114 due to a short access time of the SRAM used as the working memory 114. The modem 110 reads or writes application data directly from or into the NOR flash memory 112. When necessary, the modem 110 copies the application data in the working memory 114.
To write data in the NOR flash memory 112, the modem 110 enables the NOR flash memory 112 by the chip select signal ROM_CSB, designates a predetermined address by the address signal A during enabling the write enable signal WRB, and provides data to the NOR flash memory 112 by the data signal D at the same time. The NOR flash memory 112 is enabled by the chip select signal ROM_CSB and upon receipt of the address signal A and the data signal D for the period of enabling the write enable signal WRB, it stores the data represented by the data signal D in an area designated by the address signal A.
To read data from the NOR flash memory 112, the modem 110 enables the NOR flash memory 112 by the chip select signal ROM_CSB and receives the data signal D from the NOR flash memory 112 by the address signal A during enabling of the read enable signal RDB. The NOR flash memory 112 is enabled by the chip select signal ROM_CSB, reads data from a memory area designated by the address signal A received from the modem 110 during enabling of the read enable signal RDB, and transmits the data signal D to the modem 110.
To write data in the working memory 114, the modem 110 enables the working memory 114 by the chip select signal RAM_CSB and upon receipt of the address signal A and the data signal D during enabling the write enable signal WRB, it stores the data signal D representing data in a memory area designated by the address signal A.
To read data from the working memory 114, the modem 110 enables the working memory 114 by the chip select signal RAM_CSB and receives the data signal D from the working memory 114 by the address signal A during enabling the read enable signal RDB. The working memory 114 is enabled by the chip select signal RAM_CSB, reads data from a memory area designated by the address signal A during enabling of the read enable signal RDB, and transmits the data signal D to the modem 110.
A memory capacity of 16 or 32 Mbit is sufficient for services provided from an MS at present. However, considering the rapid growth of the communications market, various MS services, advanced functions, high capacity, and the resulting increase in data file size, a memory capacity requirement is 64/128 Mbit or larger.
It is impossible to provide inexpensive NOR flash memories with an increased memory speed requirement in view of its structure. Moreover, the drastically growing demands for NOR flash memories add to the difficulty with supplying parts for manufacture of NOR flash memories. In this context, NAND flash memories may become more widely used as memories for MSs because they can be provided at cheap prices.
In a comparison between a NOR flash memory and a NAND flash memory with the same capacity, the former is 3.56 dollars per mega byte and the latter is 0.83 dollars per mega byte. It is expected that the NOR flash memory and the NAND flash memory will be 3.06 and 0.6 dollars, respectively in 2002.
In terms of density, a NAND flash memory of 512 Mbit corresponds to a 64-Mbit NOR flash memory is. In 2002, a NAND flash memory of 1024 Mbit will correspond to a 128-Mbit NOR flash memory.
It can therefore be concluded that the NAND flash memory is better than the NOR flash memory in terms of cost and density. Therefore, NOR flash memories have reached their limits of use in MSs.
It is, therefore, an object of the present invention to provide an MS using a NAND flash memory.
It is another object of the present invention to provide an apparatus and method for interfacing data between a modem and a NAND flash memory in an MS.
To achieve the above and other objects, there are provided an apparatus and method for interfacing data between a modem and a NAND flash memory in an MS. In an interface circuit between the NAND flash memory and the modem, a working memory has a capacity smaller than the capacity of the NAND flash memory, copies part of the information stored in the NAND flash memory therein, has second addresses different from the first addresses of the NAND flash memory. A programmable memory has basic codes required to copy the part of the information stored in the NAND flash memory to the working memory. A controller is connected to the programmable memory, for controlling random reading of the information stored in the working memory using the second addresses.
To write data in the NAND flash memory, a write command is transmitted to the NAND flash memory by enabling a second chip select signal for activating the NAND flash memory and a command latch enable signal when the modem enables a first chip select signal and the write command. A write address is transmitted to the NAND flash memory by disabling the command latch enable signal and enabling an address latch enable signal and writing data from the modem in the NAND flash memory. An error correction code for the data is generated in an error correction code generator by disabling the address latch enable signal and a third chip select signal. The error correction code is transmitted to the NAND flash memory by disabling the third chip select signal and enabling the second chip select signal for activating the NAND flash memory, and written in the NAND flash memory. Then, the second chip select signal is disabled.
To read data from the NAND flash memory, a read command is transmitted to the NAND flash memory by enabling a second chip select signal for activating the NAND flash memory and a command latch enable signal when the modem enables a first chip select signal and the read command. A read address is transmitted to the NAND flash memory by disabling the command latch enable signal and enabling an address latch enable signal, and data at the read address and an error correction code for the data is read. An error correction code for the data is generated in the error correction code generator by disabling the address latch enable signal and a third chip select signal. When the third chip select signal is disabled, it is determined whether the read data has errors by comparing the read error correction code with the generated error correction code. If it is determined that the read data has errors, the errors are corrected.